Seeding from bulk silicon (lateral epitaxy) has been used in Ar+ laserrecrystallization to achieve subboundary free silicon on insulator areas. Onthese areas C.MOS devices have been performed using almost entirely thestandard processing steps of a bulk micronic C-MOS technology. n -MOStransistors with channel length as small as 0.3 um have shown very smallleakage currents. This is attributed especially to the lack ofsubboundaries. A 40 % increase in the dynamic performances in comparisonwith equivalent size C-MOS bulk devices has been obtained (93 ps of delaytime per stage for a 101 stages ring oscillator with 0.8 μm of channellength). This is the best result presented so far on recrystallized SOI. Nospecial requirements are needed in the lay out of the circuit with thechosen seed structure. Furthermore an industrial processing rate for thelaser recrystallization processing has been achieved using an ellipticallaser beam, a high scan velocity (30 cm/s) and a 100 μm line to line scanstep (a 4' wafer in 4 minutes).