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Fabrication Process of Porous Silicon-Based Optoelectronic Devices

Published online by Cambridge University Press:  25 February 2011

Nader M. Kalkhoran
Nader M. Kalkhoran*
Affiliation:
Spire Corporation, One Patriots Park, Bedford, MA 01730–2396
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Abstract

A patterning process compatible with conventional Si electronics technology, which has resolution better than 5 μm, has been developed in order to perform selected-area anodic etching for producing luminescent porous Si layers (PSL). Correlations between the anodic etching and photolithographic parameters have been identified, and their effects on the resolution and luminescence of porous Si layers have been studied. Finally, the first monolithic processing, i.e.,. true wafer-scale integration, of a Si-based visible light-emitting diode (LED) and a photodetector using conventional Si technology has been demonstrated.

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References

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