Hostname: page-component-54dcc4c588-ff9ft Total loading time: 0 Render date: 2025-10-12T09:13:30.820Z Has data issue: false hasContentIssue false
  • English
  • Français

Effects of Hydrogen Annealing Process Conditions on Nano Scale Silicon (011) Fins

Published online by Cambridge University Press:  01 February 2011

Rownak J. Zaman ,
Weize Xiong ,
Rudy Quintanilla ,
Thomas Schulz ,
C. Rinn Cleavelin ,
Rick Wise ,
Mike Pas ,
Paul Patruno ,
Klaus Schruefer  and
Sanjay K. Banerjee
Rownak J. Zaman
Affiliation:
ATDF, 2706 Montopolis Drive, Austin, TX 78741, USA
Weize Xiong
Affiliation:
SiTD, Texas Instruments Inc., 13560 North Central Expressway, Dallas, TX 75243, USA
Rudy Quintanilla
Affiliation:
ATDF, 2706 Montopolis Drive, Austin, TX 78741, USA
Thomas Schulz
Affiliation:
Infineon Technologies, München, Germany
C. Rinn Cleavelin
Affiliation:
SiTD, Texas Instruments Inc., 13560 North Central Expressway, Dallas, TX 75243, USA
Rick Wise
Affiliation:
SiTD, Texas Instruments Inc., 13560 North Central Expressway, Dallas, TX 75243, USA
Mike Pas
Affiliation:
SiTD, Texas Instruments Inc., 13560 North Central Expressway, Dallas, TX 75243, USA
Paul Patruno
Affiliation:
SOITEC USA, 2 Centennial Drive, Peabody, MA 01960, USA
Klaus Schruefer
Affiliation:
Infineon Technologies, München, Germany
Sanjay K. Banerjee
Affiliation:
University of Texas at Austin, Microelectronics Research Center, Austin, TX 78758, USA
Get access

Abstract

In this paper we present a comprehensive study of the impact of the Hydrogen (H2) annealing conditions on nano scale silicon fin structures. Hydrogen pressure was varied from 15Torr to 600Torr and anneal temperature was varied from 600°C to 900°C. We found H2 annealing can cause faceting, corner rounding and smoothing of the etched silicon surfaces. The degree of the fin transformation is a function of both pressure and temperature. Furthermore, low pressure and high temperature enhance the silicon movement and can cause damage to the nano scale fins.

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 872: Symposium J – Micro- and Nanosystems—Materials and Devices , 2005 , J3.1
Copyright
Copyright © Materials Research Society 2005

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

Article purchase

Temporarily unavailable

References

1 Hisamoto, D., Lee, W. C., Kedzierski, J., Takeuchi, H., Asano, K., Kuo, C., Anderson, E., King, T. -J., Bokor, J., and Hu, C., “FinFET -- a Self-aligned Double-gate MOSFET Scalable to 20 nm,” IEEE Transactions on Electron Devices, Vol. 47, No. 12, (2000), pp. 2320–2325.Google Scholar
2 Chau, R., Doyle, B., Kavalieros, J., Barlage, D., Murthy, A., Doczy, M., Rios, R., Linton, T., Arghavani, R., Jin, B., Datta, S. and Hareland, S., “Advanced Depleted-Substrate Transistors: Single-gate, Double-gate and Tri-gate,” Intl. Conf. on Solid State Devices and Materials, Nagoya, Japan, (2002), pp. 68–69 Google Scholar
3 Park, J.-T., Colinge, J.-P., and Diaz, C. H., “Pi-Gate SOI MOSFET,” IEEE Electron Device Lett., vol. 22, no. 8, (2001), pp. 405–406.Google Scholar
4 Yang, F. -L., Chen, H., Chen, F., Haung, C., Chang, C., Chiu, H., Lee, C., Chen, C., Huang, H., Chen, C., Tao, H., Yeo, Y., Liang, M., and Hu, C., “25 nm CMOS Omega FETs,” IEDM Technical Digest, (2002), pp.225–258.Google Scholar
5 Xiong, W., Gebara, G., Zaman, J., Gostkowski, M., Nguyen, B., Smith, G., Lewis, D., Cleavelin, C. R., Wise, R., Yu, S., Pas, M., King, T.-J., and Colinge, J. P., “Improvement of FinFET electrical characteristics by hydrogen annealing,” IEEE Electron Device Letters, Vol. 25, No. 8, (2004), pp. 541–543.Google Scholar
6Intel ponders trigate transistor at 30nm: http://www.eetimes.com/issue/mn/OEG20030616S0045 Google Scholar
7 Kuribayashi, H., Hiruta, R., and Shimizu, R., “Shape transformation of silicon trenches during hydrogen annealing,” JVS A 21(4), (2003), pp.1279–1283.Google Scholar
8 Lee, J-S., Choi, Y-K., Ha, D., Babasubramanian, S., King, T-J., and Bokor, J., “Hydrogen Annealing Effect on DC and Low-Frequency Noise Characteristics in CMOS FinFETs,” IEEE Electron Device Letters, Vol. 24, No. 3, (2003), pp. 186–188.Google Scholar
9 Gondran, C. F. H., Morales, E., Guerry, A., Xiong, W., Cleavelin, C. R., Wise, R., Balasubramanian, S., and King, T.-J., “Fin Sidewall Micro-roughness Measurement by AFM,” MRS 2004 Spring Meeting, Symposium E, CA, USA, (2004).Google Scholar
10 Xiong, W., Cleavelin, C.R., Schulz, T., Zaman, R.J., Quintanilla, R., Saulters, J., Patruno, P. Maleville, C., “Surface Preparation for Silicon Fins Prior to H2 Annealing,” SEMATECH Surface Preparation and clean conference, (2005).Google Scholar
11 Kuribayashi, H., and Shimizu, R., “Hydrogen Pressure Dependence of Trench Corner Rounding During Hydrogen Annealing,” JVS A 22(4), (2004), pp.1406–1409.Google Scholar
12 Jeong, S. and Oshiyama, A., Phys. Rev. Letters 79, 4425 (1997)Google Scholar