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Electrical and Structural Properties of MeV Si+ Ion Implantation in Silicon

Published online by Cambridge University Press:  26 February 2011

Aditya Agarwal ,
S. Koveshnikov ,
K. Christensen  and
G. A. Rozgonyi
Aditya Agarwal
Affiliation:
Department of Materials Science and Engineering North Carolina State University, Raleigh NC 27605, USA
S. Koveshnikov
Affiliation:
Department of Materials Science and Engineering North Carolina State University, Raleigh NC 27605, USA
K. Christensen
Affiliation:
Department of Materials Science and Engineering North Carolina State University, Raleigh NC 27605, USA
G. A. Rozgonyi
Affiliation:
Department of Materials Science and Engineering North Carolina State University, Raleigh NC 27605, USA
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Abstract

The electrical properties of residual MeV ion implantation damage in Si after annealing from 600 to 1100°C for 1 hour have been investigated using Deep Level Transient Spectroscopy, Capaciatance-Voltage, and Current-Voltage measurements. These data have been correlated with structural defects imaged by Transmission Electron Microscopy. It is shown that at least 4 deep levels are associated with the buried layer of extended defects after annealing at 800, 900, 1000 and 1100°C. Additionally, for the wafer annealed at 800°C at least 5 more deep level centers are present in the device layer above the buried defects.

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References

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